Lattice Semiconductor ICE40LP1K-QN84 | 搜芯易Sourcengine

Lattice Semiconductor ICE40LP1K-QN84

生命周期状态
Active-Unconfirmed
RoHS
符合RoHS标准
REACH
REACH compliant
说明
FPGA iCE40 LPFamily 1280Cells 1.2V 84-Pin QFN EP Tray
类别
Semiconductors Programmable Logic ICs Field Programmable Gate Arrays

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.31.00.01
SB Code
8542.31.00.60

Technology
CMOS
Width (mm)
7
Length (mm)
7
JESD-30 Code
S-XBCC-B84
Organization
160 CLBS
Package Code
HVBCC
Package Shape
SQUARE
Package Style
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE Meter
Surface Mount
YES
Terminal Form
BUTT
Number of CLBs
160
Number of Inputs
67
DLA Qualification
Not Qualified
Number of Outputs
67
Temperature Grade
INDUSTRIAL
Terminal Position
BOTTOM
Number of Terminals
84
Terminal Pitch (mm)
0.5
Number of Logic Cells
1280
Package Body Material
UNSPECIFIED
Seated Height-Max (mm)
0.95
Supply Voltage-Max (V)
1.26
Supply Voltage-Min (V)
1.14
Supply Voltage-Nom (V)
1.2
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Package Equivalence Code
SLGA84,14X14,20
Clock Frequency-Max (MHz)
133
Moisture Sensitivity Level
3
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
100
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
30
Combinatorial Delay of a CLB-Max (ns)
9.36