SK Hynix HYMP512P72BP4L-Y5 | 搜芯易Sourcengine

SK Hynix HYMP512P72BP4L-Y5

生命周期状态
Discontinued
RoHS
符合RoHS标准
说明
DDR2 DRAM Module, 128MX72, 0.45ns, CMOS
类别
Semiconductors Memory ICs DRAMs DDR2 DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.36
SB Code
8542.32.00.23

I/O Type
COMMON
Technology
CMOS
Access Mode
SINGLE BANK PAGE BURST
JESD-30 Code
R-XDMA-N240
Memory Width
72
Package Code
DIMM
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
NO LEAD
Memory IC Type
DDR2 DRAM MODULE
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Number of Ports
1
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Memory Organization
128MX72
Number of Functions
1
Number of Terminals
240
Terminal Pitch (mm)
1
Access Time-Max (ns)
0.45
Number of Words Code
128M
Memory Density (bits)
9663676416
Package Body Material
UNSPECIFIED
Output Characteristics
3-STATE
Supply Voltage-Max (V)
1.9
Supply Voltage-Min (V)
1.7
Supply Voltage-Nom (V)
1.8
Number of Words (words)
134217728
Package Equivalence Code
DIMM240,40
Clock Frequency-Max (MHz)
333
Operating Temperature-Max (Cel)
55
Operating Temperature-Min (Cel)
0