SK Hynix HYMD564M646CLP6-J | 搜芯易Sourcengine

SK Hynix HYMD564M646CLP6-J

生命周期状态
Discontinued
RoHS
符合RoHS标准
REACH
REACH compliant
说明
DDR DRAM Module, 64MX64, 0.7ns, CMOS
类别
Semiconductors Memory ICs DRAMs DDR DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.36
SB Code
8542.32.00.23

I/O Type
COMMON
Technology
CMOS
Access Mode
DUAL BANK PAGE BURST
JESD-30 Code
R-XDMA-N200
Memory Width
64
Organization
64MX64
Package Code
DIMM
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
NO LEAD
Memory Density
4294967296 bit
Memory IC Type
DDR DRAM MODULE
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Access Time-Max
0.7 ns
Number of Ports
1
Number of Words
67108864 words
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Number of Functions
1
Number of Terminals
200
Number of Words Code
64M
Qualification Status
Not Qualified
Package Body Material
UNSPECIFIED
Output Characteristics
3-STATE
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
2.7 V
Supply Voltage-Min (Vsup)
2.3 V
Supply Voltage-Nom (Vsup)
2.5 V
Peak Reflow Temperature (Cel)
260
Time@Peak Reflow Temperature-Max (s)
20