Renesas Technology Corp. HD74LV74RP | 搜芯易Sourcengine

Renesas Technology Corp. HD74LV74RP

生命周期状态
Transferred
说明
D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14
类别
Semiconductors Logic ICs FF/Latches D FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
LV/LV-A/LVX/H
Technology
CMOS
Width (mm)
3.95
Length (mm)
8.65
JESD-30 Code
R-PDSO-G14
Package Code
SOP
Trigger Type
POSITIVE EDGE
Logic IC Type
D FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
1
fmax-Min (MHz)
100
Output Polarity
COMPLEMENTARY
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
14
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
22
Seated Height-Max (mm)
1.75
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
2
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40