Renesas Technology Corp. HD74LS73ARPEL | 搜芯易Sourcengine

Renesas Technology Corp. HD74LS73ARPEL

生命周期状态
Transferred
说明
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, PDSO14
类别
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
LS
Technology
TTL
Width (mm)
3.95
Length (mm)
8.65
JESD-30 Code
R-PDSO-G14
Package Code
SOP
Trigger Type
NEGATIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
2
Packing Method
TR
fmax-Min (MHz)
30
Output Polarity
COMPLEMENTARY
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL EXTENDED
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
14
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
20
Seated Height-Max (mm)
1.75
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Supply Current-Max (mA)
6
Package Equivalence Code
SOP14,.25
Frequency-Max@Nom-Sup (Hz)
30000000
Output Low Current-Max (mA)
8
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Operating Temperature-Max (Cel)
75
Operating Temperature-Min (Cel)
-20
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED