EPM7256ERM208-15
ALTERA CORP
- 生命周期状态Discontinued
- REACHREACH compliant
- 说明EE PLD, 15ns, 256-Cell, CMOS, PQFP208
- 类别
- ECCN3A001.a.2.c
- ECCN GovernanceEAR
- HTS Code8542.31.00.55
- SB Code8542.31.00.55
- JTAG BSTNO
- TechnologyCMOS
- Width (mm)28
- Length (mm)28
- JESD-30 CodeS-PQFP-G208
- Organization0 DEDICATED INPUTS, 160 I/O
- Package CodeFQFP
- Package ShapeSQUARE
- Package StyleFLATPACK, FINE PITCH Meter
- Surface MountYES
- Terminal FormGULL WING
- J-STD-609 Codee0
- Output FunctionMACROCELL
- Terminal FinishTIN LEAD
- Number of Inputs164
- DLA QualificationNot Qualified
- Number of Outputs160
- Temperature GradeMILITARY
- Terminal PositionQUAD
- Additional Feature256 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
- Number of I/O Lines160
- Number of Terminals208
- Terminal Pitch (mm)0.5
- Number of Macro Cells256
- Package Body MaterialPLASTIC/EPOXY
- In-System ProgrammableNO
- Propagation Delay (ns)15
- Seated Height-Max (mm)4.07
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Programmable Logic TypeEE PLD
- Package Equivalence CodeHQFP208,1.2SQ,20
- Clock Frequency-Max (MHz)76.9
- Number of Dedicated Inputs0
- Peak Reflow Temperature (Cel)220
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-55
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EPM7256ERM208-15