ALTERA CORP EPM7256AEFI256-12 | 搜芯易Sourcengine

ALTERA CORP EPM7256AEFI256-12

生命周期状态
Discontinued
说明
EE PLD, 12ns, CMOS, PBGA256
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
17
Length (mm)
17
JESD-30 Code
S-PBGA-B256
Organization
0 DEDICATED INPUTS, 164 I/O
Package Code
TBGA
Package Shape
SQUARE
Package Style
GRID ARRAY, THIN PROFILE Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e1
Output Function
MACROCELL
Terminal Finish
TIN SILVER COPPER
Number of Inputs
164
DLA Qualification
Not Qualified
Number of Outputs
164
Temperature Grade
INDUSTRIAL
Terminal Position
BOTTOM
Number of I/O Lines
164
Number of Terminals
256
Terminal Pitch (mm)
1
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
12
Seated Height-Max (mm)
1.1
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Clock Frequency-Max (MHz)
100
Number of Dedicated Inputs
0
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40