ALTERA CORP EPM7128AEFC100-12 | 搜芯易Sourcengine

ALTERA CORP EPM7128AEFC100-12

生命周期状态
Discontinued
REACH
REACH compliant
说明
EE PLD, 12ns, 128-Cell, CMOS, PBGA100
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
11
Length (mm)
11
JESD-30 Code
S-PBGA-B100
Organization
0 DEDICATED INPUTS, 84 I/O
Package Code
TBGA
Package Shape
SQUARE
Package Style
GRID ARRAY, THIN PROFILE Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
Number of Inputs
84
DLA Qualification
Not Qualified
Number of Outputs
84
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Additional Feature
YES
Number of I/O Lines
84
Number of Terminals
100
Terminal Pitch (mm)
1
Number of Macro Cells
128
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
12
Seated Height-Max (mm)
1.1
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
BGA100,10X10,40
Clock Frequency-Max (MHz)
100
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0