EPM5130LM
ALTERA CORP
- 生命周期状态Discontinued
- 说明OT PLD, 55ns, 128-Cell, CMOS, PQCC84
- 类别
- ECCN3A001.a.2.c
- ECCN GovernanceEAR
- HTS Code8542.31.00.55
- SB Code8542.31.00.55
- JTAG BSTNO
- TechnologyCMOS
- Width (mm)29.3116
- Length (mm)29.3116
- JESD-30 CodeS-PQCC-J84
- Organization19 DEDICATED INPUTS, 48 I/O
- Package CodeQCCJ
- Package ShapeSQUARE
- Package StyleCHIP CARRIER Meter
- Surface MountYES
- Terminal FormJ BEND
- J-STD-609 Codee0
- Output FunctionMACROCELL
- Terminal FinishTIN LEAD
- Number of Inputs68
- DLA QualificationNot Qualified
- Number of Outputs48
- Temperature GradeMILITARY
- Terminal PositionQUAD
- Additional FeatureLABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
- Number of I/O Lines48
- Number of Terminals84
- Terminal Pitch (mm)1.27
- Number of Macro Cells128
- Package Body MaterialPLASTIC/EPOXY
- In-System ProgrammableNO
- Propagation Delay (ns)55
- Seated Height-Max (mm)5.08
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Programmable Logic TypeOT PLD
- Package Equivalence CodeLDCC84,1.2SQ
- Clock Frequency-Max (MHz)33.3
- Number of Dedicated Inputs19
- Peak Reflow Temperature (Cel)220
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-55
- Screening Level / Reference Standard38535Q/M;38534H;883B
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EPM5130LM