EPM5130G5962
ALTERA CORP
- 生命周期状态Discontinued
- 说明UV PLD, 55ns, CMOS, CPGA100
- 类别
- ECCN3A001.a.2.c
- ECCN GovernanceEAR
- HTS Code8542.31.00.55
- SB Code8542.31.00.55
- TechnologyCMOS
- Width (mm)33.528
- Length (mm)33.528
- JESD-30 CodeS-CPGA-P100
- Organization19 DEDICATED INPUTS, 64 I/O
- Package CodeWPGA
- Package ShapeSQUARE
- Package StyleGRID ARRAY, WINDOW Meter
- Surface MountNO
- Terminal FormPIN/PEG
- Output FunctionMACROCELL
- DLA QualificationNot Qualified
- Temperature GradeMILITARY
- Terminal PositionPERPENDICULAR
- Additional FeatureLABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
- Number of I/O Lines64
- Number of Terminals100
- Terminal Pitch (mm)2.54
- Package Body MaterialCERAMIC, METAL-SEALED COFIRED
- Propagation Delay (ns)55
- Seated Height-Max (mm)3.81
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Programmable Logic TypeUV PLD
- Package Equivalence CodePGA100M,13X13
- Clock Frequency-Max (MHz)33.3
- Number of Dedicated Inputs19
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-55
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EPM5130G5962