EPM5127DC-2
ALTERA CORP
- 生命周期状态Discontinued
- 说明UV PLD, 128-Cell, CMOS, CDIP40
- 类别
- HTS Code8542.39.00.01
- SB Code8542.31.00.55
- JTAG BSTNO
- TechnologyCMOS
- JESD-30 CodeR-XDIP-T40
- Package CodeDIP
- Package ShapeRECTANGULAR
- Package StyleIN-LINE Meter
- Surface MountNO
- Terminal FormTHROUGH-HOLE
- J-STD-609 Codee0
- Terminal FinishTIN LEAD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionDUAL
- Additional FeatureNO
- Number of Terminals40
- Terminal Pitch (mm)2.54
- Number of Macro Cells128
- Package Body MaterialCERAMIC
- In-System ProgrammableNO
- Supply Voltage-Nom (V)5
- Programmable Logic TypeUV PLD
- Package Equivalence CodeDIP40,.6
- Peak Reflow Temperature (Cel)220
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
EPM5127DC-2有0家供应商货源可供购买或竞价
提交询价
您的询价单将直接发送给我们的销售专家: Pari
提交询价
EPM5127DC-2