ALTERA CORP EPF81188AGC208-2 | 搜芯易Sourcengine

ALTERA CORP EPF81188AGC208-2

生命周期状态
Transferred
REACH
REACH compliant
说明
Loadable PLD, 1.7ns, CMOS, CPGA208
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.60

JTAG BST
YES
Technology
CMOS
Organization
4 DEDICATED INPUTS, 148 I/O
Package Code
PGA
Package Style
GRID ARRAY Meter
Surface Mount
NO
Terminal Form
PIN/PEG
J-STD-609 Code
e0
Output Function
REGISTERED
Terminal Finish
TIN LEAD
Number of Inputs
148
DLA Qualification
Not Qualified
Number of Outputs
144
Temperature Grade
COMMERCIAL
Terminal Position
PERPENDICULAR
Number of I/O Lines
144
Number of Terminals
208
Package Body Material
CERAMIC
In-System Programmable
YES
Propagation Delay (ns)
1.7
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
PGA208(UNSPEC)
Moisture Sensitivity Level
1
Number of Dedicated Inputs
4
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0