ALTERA CORP EPF10K50VRI240-1 | 搜芯易Sourcengine

ALTERA CORP EPF10K50VRI240-1

生命周期状态
Discontinued
说明
Loadable PLD, 11.2ns, CMOS, PQFP240
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
32
Length (mm)
32
JESD-30 Code
S-PQFP-G240
Organization
4 DEDICATED INPUTS, 189 I/O
Package Code
HFQFP
Package Shape
SQUARE
Package Style
FLATPACK, HEAT SINK/SLUG, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Output Function
REGISTERED
Terminal Finish
MATTE TIN
Number of Inputs
193
DLA Qualification
Not Qualified
Number of Outputs
189
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Number of I/O Lines
189
Number of Terminals
240
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
11.2
Seated Height-Max (mm)
4.1
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
LOADABLE PLD
Clock Frequency-Max (MHz)
769.23
Number of Dedicated Inputs
4
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40