ALTERA CORP EPF10K50EFC256-2 | 搜芯易Sourcengine

ALTERA CORP EPF10K50EFC256-2

生命周期状态
Transferred
说明
Loadable PLD, 0.6ns, CMOS, PBGA256
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
17
Length (mm)
17
JESD-30 Code
S-PBGA-B256
Organization
191 I/O
Package Code
BGA
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e0
Output Function
MIXED
Terminal Finish
TIN LEAD
Number of Inputs
191
DLA Qualification
Not Qualified
Number of Outputs
191
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Additional Feature
2880 LOGIC ELEMENTS
Number of I/O Lines
191
Number of Terminals
256
Terminal Pitch (mm)
1
Number of Logic Cells
2880
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
0.6
Seated Height-Max (mm)
2.1
Supply Voltage-Max (V)
2.7
Supply Voltage-Min (V)
2.3
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
BGA256,16X16,40
Clock Frequency-Max (MHz)
140
Moisture Sensitivity Level
3
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
20