PCA ELECTRONICS INC EP6700-1T | 搜芯易Sourcengine

PCA ELECTRONICS INC EP6700-1T

生命周期状态
Active
说明
Passive Delay Line, 1-Func, 10-Tap, True Output, Hybrid
类别
Semiconductors Logic ICs Delay Lines PASSIVE DELAY LINE

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
EP67
Technology
HYBRID
Width (mm)
5.461
Length (mm)
37.211
JESD-30 Code
R-XSIP-T14
Package Code
SIP
Logic IC Type
PASSIVE DELAY LINE
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Output Polarity
TRUE
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
SINGLE
Additional Feature
MAX RISE TIME CAPTURED
Number of Functions
1
Number of Terminals
14
Terminal Pitch (mm)
2.54
Number of Taps/Steps
10
Total Delay-Nom (ns)
10
Package Body Material
UNSPECIFIED
Seated Height-Max (mm)
9.525
Programmable Delay Line
NO
Moisture Sensitivity Level
3
Output Impedance-Nom (ohm)
50
Peak Reflow Temperature (Cel)
225
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0