ALTERA CORP EP600PC-2 | 搜芯易Sourcengine

ALTERA CORP EP600PC-2

生命周期状态
Discontinued
说明
OT PLD, 35ns, CMOS, PDIP24
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices OT PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
7.62
Length (mm)
26.162
JESD-30 Code
R-PDIP-T24
Organization
4 DEDICATED INPUTS, 16 I/O
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
Output Function
MACROCELL
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
LG_MAX, SEATED HGT-NOM
Number of I/O Lines
16
Number of Terminals
24
Terminal Pitch (mm)
2.54
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
35
Seated Height-Max (mm)
3.81
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
OT PLD
Clock Frequency-Max (MHz)
22.2
Number of Dedicated Inputs
4
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0