ALTERA CORP EP20K200RI240-2V | 搜芯易Sourcengine

ALTERA CORP EP20K200RI240-2V

生命周期状态
Discontinued
说明
Loadable PLD, 3ns, CMOS, PQFP240
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
32
Length (mm)
32
JESD-30 Code
S-PQFP-G240
Organization
4 DEDICATED INPUTS, 174 I/O
Package Code
FQFP
Package Shape
SQUARE
Package Style
FLATPACK, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Output Function
MACROCELL
Terminal Finish
MATTE TIN
Number of Inputs
168
DLA Qualification
Not Qualified
Number of Outputs
168
Terminal Position
QUAD
Number of I/O Lines
174
Number of Terminals
240
Terminal Pitch (mm)
0.5
Number of Logic Cells
8320
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
3
Seated Height-Max (mm)
4.1
Supply Voltage-Max (V)
2.625
Supply Voltage-Min (V)
2.375
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
QFP240,1.3SQ,20
Clock Frequency-Max (MHz)
160
Number of Dedicated Inputs
4
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
100
Operating Temperature-Min (Cel)
-40