ALTERA CORP EP20K100RC208-1V | 搜芯易Sourcengine

ALTERA CORP EP20K100RC208-1V

生命周期状态
Discontinued
REACH
REACH compliant
说明
Loadable PLD, 0.3ns, CMOS, PQFP208
类别
Semiconductors Programmable Logic ICs Programmable Logic Devices LOADABLE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

Technology
CMOS
Width (mm)
28
Length (mm)
28
JESD-30 Code
S-PQFP-G208
Organization
4 DEDICATED INPUTS, 159 I/O
Package Code
HFQFP
Package Shape
SQUARE
Package Style
FLATPACK, HEAT SINK/SLUG, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Output Function
MACROCELL
Terminal Finish
MATTE TIN
Number of Inputs
153
DLA Qualification
Not Qualified
Number of Outputs
153
Temperature Grade
OTHER
Terminal Position
QUAD
Number of I/O Lines
159
Number of Terminals
208
Terminal Pitch (mm)
0.5
Number of Logic Cells
4160
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
0.3
Seated Height-Max (mm)
4.1
Supply Voltage-Max (V)
2.625
Supply Voltage-Min (V)
2.375
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
LOADABLE PLD
Package Equivalence Code
QFP208,1.2SQ,20
Clock Frequency-Max (MHz)
100
Number of Dedicated Inputs
4
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
0