DSP ARCHITECTURES INC DSP24-Y-100-C | 搜芯易Sourcengine

DSP ARCHITECTURES INC DSP24-Y-100-C

生命周期状态
Discontinued
说明
Mixed Signal Processor, 24-Bit Size, 0-Ext Bit, 100MHz, PBGA432
类别
Semiconductors UPs/uCs/Peripheral ICs Digital Signal Processors DIGITAL SIGNAL PROCESSOR, MIXED

ECCN
3A991.a.2
ECCN Governance
EAR
HTS Code
8542.31.00.35
SB Code
8542.31.00.35

Format
FIXED POINT
Bit Size
24
Width (mm)
40
Length (mm)
40
JESD-30 Code
S-PBGA-B432
Package Code
BGA
Boundary Scan
YES
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
YES
Terminal Form
BALL
Barrel Shifter
NO
Low Power Mode
YES
Address Bus Width
16
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Number of Terminals
432
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
1.7
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
External Data Bus Width
0
Supply Current-Max (mA)
1200
Package Equivalence Code
BGA432,31X31,50
Clock Frequency-Max (MHz)
100
Internal Bus Architecture
MULTIPLE
uPs/uCs/Peripheral ICs Type
DIGITAL SIGNAL PROCESSOR, MIXED
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0