DALLAS SEMICONDUCTOR DS1100U-300/T&R | 搜芯易Sourcengine

DALLAS SEMICONDUCTOR DS1100U-300/T&R

生命周期状态
Transferred
说明
Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO8
类别
Semiconductors Logic ICs Delay Lines SILICON DELAY LINE

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
1100
Technology
CMOS
Width (mm)
3
Length (mm)
3
JESD-30 Code
S-PDSO-G8
Package Code
TSSOP
Logic IC Type
SILICON DELAY LINE
Package Shape
SQUARE
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Output Polarity
TRUE
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
1
Number of Terminals
8
Terminal Pitch (mm)
0.65
Number of Taps/Steps
5
Total Delay-Nom (ns)
300
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
1.1
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Delay Line
NO
Supply Current-Max (mA)
50
Package Equivalence Code
TSSOP8,.19
Output Impedance-Nom (ohm)
50
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
309