DPAC TECHNOLOGIES CORP DPSD96MX8WKY5-DP-XXP12 | 搜芯易Sourcengine

DPAC TECHNOLOGIES CORP DPSD96MX8WKY5-DP-XXP12

生命周期状态
Transferred
说明
Synchronous DRAM Module, 96MX8, CMOS, PDSO54
类别
Semiconductors Memory ICs DRAMs SYNCHRONOUS DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.32
SB Code
8542.32.00.15

Technology
CMOS
Access Mode
FOUR BANK PAGE BURST
Length (mm)
22.48
JESD-30 Code
R-PDSO-G54
Memory Width
8
Package Code
ATSOP
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, PIGGYBACK, THIN PROFILE Meter
Surface Mount
YES
Terminal Form
GULL WING
Memory IC Type
SYNCHRONOUS DRAM MODULE
Operating Mode
SYNCHRONOUS
Number of Ports
1
DLA Qualification
Not Qualified
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Memory Organization
96MX8
Number of Functions
1
Number of Terminals
54
Terminal Pitch (mm)
0.8
Number of Words Code
96M
Memory Density (bits)
805306368
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
3.81
Supply Voltage-Nom (V)
3.3
Number of Words (words)
100663296