DPAC TECHNOLOGIES CORP DPS45128-135M | 搜芯易Sourcengine

DPAC TECHNOLOGIES CORP DPS45128-135M

生命周期状态
Transferred
说明
SRAM Module, 512KX8, 135ns, CMOS
类别
Semiconductors Memory ICs SRAMs SRAM MODULE

ECCN
3A991.b.2.a
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

I/O Type
COMMON
Technology
CMOS
JESD-30 Code
R-XDMA-T48
Memory Width
8
Package Code
DIP
Output Enable
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Memory IC Type
SRAM MODULE
Operating Mode
ASYNCHRONOUS
Number of Ports
1
Parallel/Serial
PARALLEL
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Memory Organization
512KX8
Number of Functions
1
Number of Terminals
48
Terminal Pitch (mm)
2.54
Access Time-Max (ns)
135
Number of Words Code
512K
Memory Density (bits)
4194304
Package Body Material
UNSPECIFIED
Output Characteristics
3-STATE
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
524288
Standby Current-Max (A)
0.01
Standby Voltage-Min (V)
2
Supply Current-Max (mA)
470
Package Equivalence Code
DIP48,1.4
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55