HARRIS SEMICONDUCTOR CDP1852CE | 搜芯易Sourcengine

HARRIS SEMICONDUCTOR CDP1852CE

生命周期状态
EOL
说明
CDP1852 - BYTE-WIDE INPUT/OUTPUT
类别
Semiconductors UPs/uCs/Peripheral ICs Parallel IO Ports PARALLEL IO PORT, GENERAL PURPOSE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.39.00.01
SB Code
8542.39.00.60

Technology
CMOS
Width (mm)
15.24
Length (mm)
31
JESD-30 Code
R-PDIP-T24
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Number of Bits
8
Number of Ports
1
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of I/O Lines
8
Number of Terminals
24
Terminal Pitch (mm)
2.54
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
6.35
Supply Voltage-Max (V)
6.5
Supply Voltage-Min (V)
4
Supply Voltage-Nom (V)
5
External Data Bus Width
8
Supply Current-Max (mA)
0.3
Package Equivalence Code
DIP24,.6
uPs/uCs/Peripheral ICs Type
PARALLEL IO PORT, GENERAL PURPOSE
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40