Intersil Corporation CD74FCT29520AEN | 搜芯易Sourcengine

Intersil Corporation CD74FCT29520AEN

生命周期状态
Discontinued
说明
Pipeline Register, 12-Bit, CMOS, PDIP24
类别
Semiconductors UPs/uCs/Peripheral ICs DSP Peripherals DSP PERIPHERAL, PIPELINE REGISTER

ECCN
3A991.a.2
ECCN Governance
EAR
HTS Code
8542.39.00.60
SB Code
8542.39.00.60

Technology
CMOS
JESD-30 Code
R-PDIP-T24
Package Code
DIP
Boundary Scan
NO
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Low Power Mode
YES
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Number of Terminals
24
Terminal Pitch (mm)
2.54
Output Data Bus Width
8
Package Body Material
PLASTIC/EPOXY
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
External Data Bus Width
12
Package Equivalence Code
DIP24,.3
Clock Frequency-Max (MHz)
70
uPs/uCs/Peripheral ICs Type
DSP PERIPHERAL, PIPELINE REGISTER
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0