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ALDL-ACT-18

ENGINEERED COMPONENTS CO

ENGINEERED COMPONENTS CO ALDL-ACT-18
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Family
    ACT
  • Technology
    CMOS
  • Width (mm)
    7.62
  • Length (mm)
    22.86
  • JESD-30 Code
    R-XDIP-P6
  • Package Code
    QIP
  • Logic IC Type
    ACTIVE DELAY LINE
  • Package Shape
    RECTANGULAR
  • Package Style
    IN-LINE Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • Output Polarity
    TRUE
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    DUAL
  • Additional Feature
    TRIMMABLE DELAY +/- 10%; BURNED-IN TO LEVEL B OF MIL-STD-883; MAX RISE TIME CAPTURED
  • Number of Functions
    1
  • Number of Terminals
    6
  • Terminal Pitch (mm)
    2.54
  • Number of Taps/Steps
    1
  • Total Delay-Nom (ns)
    18
  • Package Body Material
    UNSPECIFIED
  • Seated Height-Max (mm)
    6.35
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • Programmable Delay Line
    NO
  • Package Equivalence Code
    DIP16,.3
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40
  • Propagation Delay-Max@Nom-Sup (ns)
    18

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ALDL-ACT-18