Integrated Device Technology, Inc. 8633AF-01 | 搜芯易Sourcengine

Integrated Device Technology, Inc. 8633AF-01

生命周期状态
Discontinued
说明
PLL Based Clock Driver, 8633 Series, 3 True Output(s), 0 Inverted Output(s), PDSO28
类别
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
8633
Width (mm)
5.3
Length (mm)
10.2
JESD-30 Code
R-PDSO-G28
Package Code
SSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
Terminal Finish
Tin/Lead (Sn85Pb15)
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
28
Terminal Pitch (mm)
0.65
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
3
Propagation Delay (ns)
4.9
Seated Height-Max (mm)
2
Supply Voltage-Max (V)
3.465
Supply Voltage-Min (V)
3.135
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
SSOP28,.3
Moisture Sensitivity Level
1
Number of Inverted Outputs
0
Peak Reflow Temperature (Cel)
240
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Propagation Delay-Max@Nom-Sup (ns)
4.9
Same Edge Clock Skew Delay-Max (ns)
0.025
Time@Peak Reflow Temperature-Max (s)
20