PHILIPS SEMICONDUCTORS 74LVT74PW | 搜芯易Sourcengine

PHILIPS SEMICONDUCTORS 74LVT74PW

生命周期状态
Transferred
说明
D Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDSO14
类别
Semiconductors Logic ICs FF/Latches D FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Technology
CMOS
JESD-30 Code
R-PDSO-G14
Package Code
TSSOP
Trigger Type
POSITIVE EDGE
Logic IC Type
D FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
14
Terminal Pitch (mm)
0.635
Load Capacitance (pF)
50
Package Body Material
PLASTIC/EPOXY
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
TSSOP14,.25
Frequency-Max@Nom-Sup (Hz)
150000000
Moisture Sensitivity Level
1
Output Low Current-Max (mA)
32
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
5