FAIRCHILD SEMICONDUCTOR CORP 74LCX112MTCX_NL | 搜芯易Sourcengine

FAIRCHILD SEMICONDUCTOR CORP 74LCX112MTCX_NL

生命周期状态
Discontinued
RoHS
符合RoHS标准
REACH
REACH compliant
说明
J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
类别
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
LVC/LCX/Z
Technology
CMOS
Width (mm)
4.4
Length (mm)
5
JESD-30 Code
R-PDSO-G16
Package Code
TSSOP
Trigger Type
NEGATIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Number of Bits
2
Packing Method
TR
fmax-Min (MHz)
150
Output Polarity
COMPLEMENTARY
Terminal Finish
MATTE TIN
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
16
Terminal Pitch (mm)
0.65
Load Capacitance (pF)
50
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
9
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
2
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
TSSOP16,.25
Moisture Sensitivity Level
1
Output Low Current-Max (mA)
24
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
7.5