Nexperia BV 74AUP2G80DC-Q100H | 搜芯易Sourcengine

Nexperia BV 74AUP2G80DC-Q100H

生命周期状态
Active
RoHS
符合RoHS标准
REACH
REACH compliant
说明
Low-power dual D-type flip-flop; positive-edge trigger
类别
Semiconductors Logic ICs FF/Latches D FLIP-FLOP

HTS Code
8542.39.00.60
SB Code
8542.39.00.60

Family
AUP/ULPA
Technology
CMOS
Width (mm)
2
Length (mm)
2.3
JESD-30 Code
R-PDSO-G8
Package Code
VSSOP
Trigger Type
POSITIVE EDGE
Logic IC Type
D FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
1
fmax-Min (MHz)
70
Output Polarity
INVERTED
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
8
Terminal Pitch (mm)
0.5
Load Capacitance (pF)
30
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
27.2
Seated Height-Max (mm)
1
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
0.8
Supply Voltage-Nom (V)
3.3
Supply Current-Max (mA)
0.0014
Package Equivalence Code
TSSOP8,.12,20
Frequency-Max@Nom-Sup (Hz)
510000000
Output Low Current-Max (mA)
4
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
8.3
Screening Level / Reference Standard
AEC-Q100