Nexperia BV 74AUP1T97GF/S500,132 | 搜芯易Sourcengine

Nexperia BV 74AUP1T97GF/S500,132

生命周期状态
Discontinued
REACH
REACH compliant
说明
Majority Logic Gate, AUP/ULP/V Series, 1-Func, 3-Input, CMOS, PDSO6
类别
Semiconductors Logic ICs Gates MAJORITY LOGIC GATE

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
AUP/ULP/V
Technology
CMOS
Width (mm)
1
Length (mm)
1
JESD-30 Code
S-PDSO-N6
Package Code
VSON
Logic IC Type
MAJORITY LOGIC GATE
Package Shape
SQUARE
Package Style
SMALL OUTLINE, VERY THIN PROFILE Meter
Surface Mount
YES
Terminal Form
NO LEAD
Schmitt Trigger
YES
Number of Inputs
3
Temperature Grade
AUTOMOTIVE
Terminal Position
DUAL
Number of Functions
1
Number of Terminals
6
Terminal Pitch (mm)
0.35
Load Capacitance (pF)
30
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
11.9
Seated Height-Max (mm)
0.5
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
2.3
Supply Voltage-Nom (V)
3.3
Supply Current-Max (mA)
0.0035
Package Equivalence Code
SOLCC6,.04,14
Output Low Current-Max (mA)
4
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
11.9