Integrated Device Technology, Inc. 74ALVCH16260PAG | 搜芯易Sourcengine

Integrated Device Technology, Inc. 74ALVCH16260PAG

生命周期状态
Transferred
RoHS
符合RoHS标准
REACH
REACH compliant
说明
Latch Multiplexed 3-ST 12-CH D-Type 56-Pin TSSOP Tube
类别
Semiconductors Logic ICs FF/Latches

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
ALVC/VCX/A
Direction
BIDIRECTIONAL
Technology
CMOS
Width (mm)
6.1
Length (mm)
14
Control Type
ENABLE LOW
JESD-30 Code
R-PDSO-G56
Package Code
TSSOP
Logic IC Type
BUS EXCHANGER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e3
Number of Bits
12
Number of Ports
3
Output Polarity
TRUE
Terminal Finish
MATTE TIN
Number of Inputs
1
DLA Qualification
Not Qualified
Number of Outputs
2
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
1
Number of Terminals
56
Terminal Pitch (mm)
0.5
Load Capacitance (pF)
50
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Propagation Delay (ns)
5.6
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
2.7
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
TSSOP56,.3,20
Moisture Sensitivity Level
1
Output Low Current-Max (mA)
24
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
4.4
Time@Peak Reflow Temperature-Max (s)
30