Integrated Device Technology, Inc. 7142LA100PDG | 搜芯易Sourcengine

Integrated Device Technology, Inc. 7142LA100PDG

生命周期状态
Transferred
RoHS
符合RoHS标准
REACH
REACH compliant
说明
PDIP 61.70x15.24x3.80 mm 2.54mm Pitch
类别
Semiconductors Memory ICs SRAMs MULTI-PORT SRAM

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

Technology
CMOS
JESD-30 Code
R-PDIP-T48
Memory Width
8
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e3
Memory IC Type
MULTI-PORT SRAM
Operating Mode
ASYNCHRONOUS
Parallel/Serial
PARALLEL
Terminal Finish
TIN
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Memory Organization
2KX8
Number of Functions
1
Number of Terminals
48
Access Time-Max (ns)
100
Number of Words Code
2K
Memory Density (bits)
16384
Package Body Material
PLASTIC/EPOXY
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
2048
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0