70121S55L52
Integrated Device Technology, Inc.
- 生命周期状态Discontinued
- REACHREACH compliant
- 说明Multi-Port SRAM, 2KX9, 55ns, CMOS, CQCC52
- 类别
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.41
- SB Code8542.32.00.40
- I/O TypeCOMMON
- TechnologyCMOS
- Width (mm)19.05
- Length (mm)19.05
- JESD-30 CodeS-CQCC-N52
- Memory Width9
- Package CodeQCCN
- Package ShapeSQUARE
- Package StyleCHIP CARRIER Meter
- Surface MountYES
- Terminal FormNO LEAD
- J-STD-609 Codee0
- Memory IC TypeMULTI-PORT SRAM
- Operating ModeASYNCHRONOUS
- Number of Ports2
- Parallel/SerialPARALLEL
- Terminal FinishTIN LEAD
- DLA QualificationNot Qualified
- Temperature GradeCOMMERCIAL
- Terminal PositionQUAD
- Memory Organization2KX9
- Number of Terminals52
- Terminal Pitch (mm)1.27
- Access Time-Max (ns)55
- Number of Words Code2K
- Memory Density (bits)18432
- Package Body MaterialCERAMIC, METAL-SEALED COFIRED
- Output Characteristics3-STATE
- Seated Height-Max (mm)2.2098
- Supply Voltage-Max (V)5.5
- Supply Voltage-Min (V)4.5
- Supply Voltage-Nom (V)5
- Number of Words (words)2048
- Standby Current-Max (A)0.015
- Standby Voltage-Min (V)4.5
- Supply Current-Max (mA)235
- Package Equivalence CodeLCC52,.75SQ
- Operating Temperature-Max (Cel)70
- Operating Temperature-Min (Cel)0
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